
d-Matrix has announced its adoption of NVIDIA's NVLink Fusion to connect its Raptor XPUs with NVIDIA's AI infrastructure platform. This integration allows d-Matrix to utilize NVIDIA's MGX rack architecture and networking solutions, facilitating a more efficient deployment of their custom silicon at scale. The partnership aims to provide a faster, lower-risk path for deploying ultralow-latency inference solutions. By aligning with NVIDIA's AI platform, d-Matrix can enhance its capabilities in AI factory environments, offering improved performance and scalability.
Read originalThe latest release of llama.cpp, b10955, tackles a critical issue of heap corruption by disabling the ggml-cpu precompiled header and fixing CACHE_LINE_SIZE ambiguity. This update ensures consistent CACHE_LINE_SIZE values across C++ kernels and C work-buffer sizing code, preventing heap-buffer-overflow and subsequent crashes. By restoring the natural include order and removing the std::hardware_destructive_interference_size branch, the update makes the value deterministic and include-order independent. This release is a technical fix that stabilizes the runtime environment for developers using llama.cpp.
The latest llama.cpp release, b10956, introduces significant improvements to the SYCL backend, particularly for handling large k values in TOP_K operations. By implementing a radix select method, the update allows for efficient GPU-resident processing, avoiding previous limitations that forced operations to fall back to the CPU. This change enhances performance, especially in scenarios requiring large k values, such as qwen4exp's sparse-attention indexer. The update ensures that operations are more efficient and scalable, providing a notable boost in processing speed without regressing any measured shapes.